Intel is preparing its new game of high performance instructions AVX10, based on the current AVX512, but with improvements that reduce loading and storage times in programs compiled with this type of extension. It will not be necessary to hardly change the code of the programs that are compiled with these new instructions, and it will improve performance and reduce consumption.
One of the main novelties and improvements introduced by AVX10, at least in its AVX10.2 version, it is the support for its hybrid architectures, supporting both high-performance P-Cores and more efficient E-Cores that was introduced with Alder Lake. Until then, both AVX512 and AVX10.1 are only compatible with P-Cores, as AVX10.1 is a first release to start integrating AVX10 support while maintaining backwards compatibility with previous instructions.
The first ranges that will receive support for AVX10 will be the Intel Xeon processors of the next generations. AVX10.1 will arrive first and, later, AVX10.2 to be integrated into the first Xeon server processors that use only E-Cores for environments where low power consumption but a high number of execution cores are required.
Later, AVX10 will also reach Intel Core family processors for home markets.
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Anthony Delgado
Computer Engineer by training, writer and hardware analyst at Geeknetic since 2011. I love gutting everything that comes my way, especially the latest hardware that we receive here for reviews. In my free time I mess around with 3d printers, drones and other gadgets. For anything here you have me.