amd has recently launched its Ryzen 9000 Series processorsthe first processors for desktop and home use that include Zen 5 cores. Some processors that have been drawn to know the content of the CCD(s) and the IOD included in this new generation. With these images we can know how they are formed these CCDs of these Ryzen 9000 Series, as well as the changes introduced with respect to the Zen 4. Also appreciated are the changes and distribution of the I/O Die.
Each CCD is made up of 8 coreswith high-end references such as the Ryzen 9 that have with 2 CCD’sleaving 1 for the Ryzen 7 9700x and Ryzen 5 9600x. Each CCD has 8 Zen 5 cores, 32 MB shared L3 cache with these 8 cores and other elements such as SMU and connectivity with the I/O Die. You can also see the diagram of one of these nuclei, which have larger size than the Zen 4and where we see that each one has 2 512KB L2 cache modules to offer 1MB total for each one, as well as the engines for instruction decoding, integer execution and others.
The interesting thing here is that the L3 cache is connected via TSVin anticipation of add 3d cache. This additional 3D cache is connected via TSV to CCD ring bus to make it work joint with the 32 MB L3and forming a total and unique set of cache to give life to the Ryzen 9000X3D with this 3D V-Cache memory.
Also the IOD has been seenthe I/O tile that does not include anything newsince it is the same one that we find in the processors Rafael. This tile is manufactured with a 6nm node from TSMC and includes the integrated GPU, as well as the PCIe 5 interface and connectivity with the CCDs, among others.
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