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Intel tests PowerVia, a new manufacturing process that places chip interconnects at the rear


Intel tests PowerVia, a new manufacturing process that places chip interconnects at the rear



in the messure that advances in the manufacture of silicon wafers with technologies of less nanometers, increases difficulty for optimal performance in the processors. The last problem seems to be the interconnections so weak and tiny that are manufactured, and that often lose the signal sometimes needing more energy to work. But Intel seems to have the solution to this problem with his new PowerVia techniquewhere did you get move these interconnects to the back side of the chip to leave it in front and on a face where there are only these interconnections.

Geeknetic Intel tests PowerVia, a new manufacturing process that places chip interconnects at the rear 1

He has called this new technique PowerVia, which even has modified the usual way of manufacturing wafers. This new technology has been under study by Intel for 10 years and it has been now when has been tested with positive results both in testing and manufacturing with this new system. Now the wafers begin to be manufactured as usual, the transistors are built and the interconnect layers are added, once this is finished the wafer is turned over and the bottom layer is polished to which the cables will be connected for the interconnections in a more direct and simple way.

Geeknetic Intel tests PowerVia, a new manufacturing process that places chip interconnects on the back 2

Some benefits of this new technique are a lower cost in the manufacture of wafersand also other benefits such as 5% more frequency and 90% in density, simply moving these cables for interconnections. Intel has tested this process with a chip called Blue Sky Creek based on the Efficient cores that will integrate the next Intel Meteor Lake, managing to solve this interconnection problem. In addition, he also wanted to prove that there are no other problems derived from this modification, such as an excess of temperature.

Geeknetic Intel tests PowerVia, a new manufacturing process that places chip interconnects at the rear 3

Intel plans manufacture processors with this technology in 2024 in the Intel Arrow Lake under the manufacturing process Intel 20A. With this method a technological advance is achieved that will put its rivals two years behind when it comes to this new technology for feeding the chips from the back.

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Article Editor: Juan Antonio Soto

Juan Antonio Soto

I am a Computer Engineer and my specialty is automation and robotics. My passion for hardware began at the age of 14 when I gutted my first computer: a 386 DX 40 with 4MB of RAM and a 210MB hard drive. I continue to give free rein to my passion in the technical articles that I write at Geeknetic. I spend most of my free time playing video games, contemporary and retro, on the 20+ consoles I own, in addition to the PC.

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