Rambus has already designed the first HBM4 memory controller. It is capable of reaching 2.56 TB/s per block

Rambus has announced the release of the first HMB4 memory controller design. It is not a physical chip or chip systems, as the company is engaged in the design “on paper” for the sale of the resulting intellectual property to other companies to implement and manufacture them.

This fourth-generation high-bandwidth memory controller will therefore be aimed at companies designing high-performance graphics cards or accelerators, especially those designed to process large amounts of data.

More specifically, the rise of Artificial Intelligence has opened up a huge market for this type of memory, and the Language Models used are becoming larger, with more than a billion parameters. This requires ever-increasing memory capacities and exponentially growing bandwidths to be able to be managed directly in the accelerator chips and reduce latency. We have already seen in the latest launches of accelerator cards in the sector that they are increasingly coming with more memory capacity, such as the 192 GB HBM3 of the AMD Instinct MI300X

The design of the Rambus HBM4 controller meets the standard of the JEDEC 6.4 Gbpsbut is able to go further and reach up to 10 Gbps on HBM4 chips that they are able to reach those figures. In total, that represents a bandwidth of up to 2.56 TB/s for each integrated HBM4 block.

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